The present invention relates generally to integrated circuit packaging and, more particularly, to a lead frame for a semiconductor packages.
Semiconductor die packaging provides for suitable external electrical connections and protection of a semiconductor die against mechanical and environmental stresses. Continued progress in reduction of the size of the semiconductor dies and increased functionality and complexity of the circuits integrated in the dies require size reduction of the packaging.
Typical types of semiconductor die packages are Quad Flat Package (QFP), which are formed with a semiconductor die mounted to a lead frame. The lead frame is formed from a sheet of metal, and has a die attach pad often called a flag that is attached to a frame with tie bars, and leads that surround the flag. Inner ends of the leads are wire bonded to electrodes of the die (die bond pads), and outer ends of the leads extend or project out of a package body. The outer lead ends provide a means of electrically connecting the die to circuit boards and the like. After the die bond pads and the inner leads are electrically connected with bond wires, the semiconductor die, bond wires and inner lead ends are encapsulated in a mold compound, with the outer lead ends exposed. These exposed or external leads are cut from the frame of the lead frame (singulated) and bent for ease of connection to a circuit board.
Once the semiconductor die and inner lead ends are encapsulated, the exposed leads are typically plated with tin. However, during the plating process gasses, such as hydrogen, are emitted which can separate (delaminate) the encapsulated regions of the leads from the mold compound. This delamination reduces the structural integrity and rigidity of the leads and may also allow moisture to access and corrode the bond wires.